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INTEGRATED CIRCUITS
74F646, 74F646A Octal transceiver/register, non-inverting (3-State) 74F648, 74F648A Octal transceiver/register, inverting (3-State)
Product specification IC15 Data Handbook 1990 Sep 25
Philips Semiconductors
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
FEATURES
* Combines 74F245 and two 74F374 type functions in one chip * High impedance base inputs for reduced loading (70A in high
and low states)
DESCRIPTION
The 74F646/74F646A and 74F648/74F648A transceivers/registers consist of bus transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes high. Output enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The select (SAB, SBA) pins determine whether data is stored or transferred through the device in real-time. The DIR determines which bus will receive data when the OE is active low. In the isolation mode (OE = high), data from bus A may be stored in the B register and/or data from bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time.
* Independent registers for A and B buses * Multiplexed real-time and stored data * Choice of non-inverting and inverting data paths * Controlled ramp outputs for 74F646A/74F648A * 3-state outputs * 300 mil wide 24-pin slim dip package
TYPE 74F646/74F648 74F646A/74F648A
TYPICAL fmax 115MHz 185MHz
TYPICAL SUPPLY CURRENT ( TOTAL) 140mA 105mA
ORDERING INFORMATION
ORDER CODE DESCRIPTION 24-pin plastic slim DIP (300mil) 24-pin plastic SOL COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F646N, N74F646AN, N74F648N, N74F648AN N74F646D, N74F646AD, N74F648D, N74F648AD SOT222-1 SOT137-1 PKG DWG #
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS A0 - A7, B0 - B7 CPAB CPBA SAB SBA DIR OE A0 - A7, B0 - B7 A and B inputs A-to-B clock input B-to-A clock input A-to-B select input B-to-A select input Data flow directional control enable input Output enable input A, B outputs for N74F646A/N74F648A DESCRIPTION 74F (U.L.) HIGH/ LOW 3.5/0.116 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 1.0/0.033 750/80 750/106.7 LOAD VALUE HIGH/ LOW 70A/70A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 20A/20A 15mA/48mA 15mA/64mA
A0 - A7, B0 - B7 A, B outputs for N74F646/N74F648 NOTE: One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state.
1990 Sep 25
2
853-1124 00515
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
PIN CONFIGURATION
74F646/646A
CPAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 10 11 24 V CC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2
IEC/IEEE SYMBOL
74F646/646A
21 3 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 1 1 6D 1 5 6 7 8 7 7 20
23 22 1 2
4 17 B3 16 B4 15 B5 14 B6 13 B7
5 5 1 2 1
4D
19 18 17 16 15
GND 12
SF00386
9 10 11 /
14 13
LOGIC SYMBOL
SF00388
74F646/646A
4 5 6 7 8 9 10 11
LOGIC DIAGRAM
A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 OE 21 74F646/646A
DIR3 23 CPBA 22 SBA 1 CPAB 2 SAB
VCC = Pin 24 GND = Pin 12
20
19
18
17
16
15
14
13
I of 8 channels
1D C1
SF00387
A0
4 1D C1
20 B0
VCC = Pin 24 GND = Pin 12
to 7 other channels
SF00393
1990 Sep 25
3
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
PIN CONFIGURATION
74F648/648A
IEC/IEEE SYMBOL
74F648/648A
21 24 V CC 23 CPBA 22 SBA 21 OE 20 B0 19 B1 18 B2 17 B3 16 B4 15 B5 14 B6 13 B7 5 6 7 8 4 1 6D 1 7 7 23 22 1 2 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 1 20 3
CPAB 1 SAB 2 DIR 3 A0 4 A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11 GND 12
5 5 1 1 2
4D
19 18 17 16 15 14 13
SF00389
9 10 11
LOGIC SYMBOL
74F648/648A
4 5 6 7 8 9 10 11
SF00391
LOGIC DIAGRAM
A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 23 22 21 CPAB SAB DIR CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 I of 8 channels 20 19 18 17 16 15 14 13 21 OE DIR CPBA SBA CPAB SAB 3 23 22 1 2 74F648/648A
1D C1
VCC = Pin 24 GND = Pin 12
SF00390
A0 4 1D C1 20 B0
to 7 other channels
SF00400
1990 Sep 25
4
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
FUNCTION TABLE
INPUTS OE X X H H L L L L NOTES: 1. H = 2. L = 3. X = 4. = 5. * = DIR X X X X L L H H CPAB X H or L X X X H or L CPBA X H or L X H or L X X SAB X X X X X X L H SBA X X X X L H X X An Input Unspecified* Input Input Output Output Input Input DATA I/O Bn Unspecified* Input Input Input Input Input Output Output OPERATING MODE 74F646/74F646A Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus Real time A data to B bus Stored A data to B bus 74F648/74F648A Store A, B unspecified* Store B, A unspecified* Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus Real time A data to B bus Stored A data to B bus
High-voltage level Low-voltage level Don't care Low-to-high clock transition The data output function may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition of the clock.
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Supply voltage Input voltage Input current Voltage applied to output in high output state Current applied to output in low output state 74F646A, 74F648A 74F646, 74F648 Tamb Tstg Operating free air temperature range Storage temperature range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 72 128 0 to +70 -65 to +150 UNIT V V mA V mA mA
C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VIH VIL IIk IOH IOL Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current 74F646A, 74F648A 74F646, 74F648 Tamb Operating free air temperature range 0 4.5 2.0 0.8 -18 -15 48 64 +70 LIMITS NOM 5.0 MAX 5.5 V V V mA mA mA mA UNIT
C
1990 Sep 25
5
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74F646/646A and 74F648/648A. The select pins determine whether
data is stored or transferred through the device in real time. The output enable pins determine the direction of the data flow.
BUS MANAGEMENT FUNCTIONS
REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B STORAGE FROM A, B, OR A AND B TRANSFER STORED DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
BUS A
BUS B
OE DIR CPAB CPBA SAB SBA L L X X X L
OE DIR CPAB CPBA SAB SBA L H X X L X
OE DIR CPAB CPBA SAB SBA X X X X X X X X X X H X X X
OE DIR CPAB CPBA SAB SBA L L X H or L X H L H H or L X H X
SF00392
1990 Sep 25
6
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VCC = MIN, VOH High-level output voltage VIL = MAX, VIH = MIN VOL Low-level output voltage All 74F646/74F648 only VIK II IIH IIL IOZH + IIH IOZL + IIL IOS IO Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Off-state output current, high-level voltage applied Off-state output current, low-level voltage applied Short-circuit output current3 Output current4 74F646, 74F648 74F646A, 74F648A 74F646, 74F648 ICC Supply current (total) 74F646A, 74F648A ICCH ICCL ICCZ ICCH ICCL ICCZ VCC = MAX VCC = MAX others A0-A7, B0-B7 OE, DIR, CPAB, CPBA, SAB, SBA A0 - A7, B0 -B7 VCC = MIN, VIL = MAX, VIH = MIN IOH = -15mA IOL = 48mA IOL = 64mA IOH = -3mA 10%VCC 5%VCC 10%VCC 10%VCC 5%VCC MIN 2.4 2.7 2.0 0.38 0.42 -0.73 0.55 0.55 -1.2 100 1 20 -20 70 -70 -100 -60 125 160 135 100 110 105 -225 -150 165 210 160 145 155 155 3.4 LIMITS TYP2 MAX V V V V V V A mA A A A A mA mA mA mA mA mA mA UNIT
VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V VCC = MAX, VI = 5.5V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX, VO = 2.7V VCC = MAX, VO = 0.5V VCC = MAX VCC = MAX, V0 = 2.25V
mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. Unless otherwise specified, VX = VCC for all test conditions. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 4. IO is tested under conditions that produce current approximately one half of the true short-circuit output current (IOS).
1990 Sep 25
7
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
AC ELECTRICAL CHARACTERISTICS FOR 74F646
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ Maximum clock frequency Propagation delay CPAB or CPBA to An or Bn Propagation delay An to Bn or Bn to An Propagation delay SAB or SBA to An or Bn Output enable time OE to An or Bn Output enable time DIR to An or Bn Output disable time OE to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 2 Waveform 2, 3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 100 5.5 5.5 4.0 4.0 5.0 5.0 5.0 6.5 4.5 6.0 6.5 6.5 5.5 5.5 TYP 115 7.5 8.0 6.0 6.5 7.0 6.5 7.0 8.5 6.5 8.5 9.0 9.0 8.5 8.5 10.0 10.0 9.0 8.0 8.5 8.5 10.0 11.0 9.0 11.0 11.5 11.5 11.0 11.0 MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 90 5.0 5.0 4.0 4.0 4.5 4.5 4.5 6.0 4.0 5.5 6.0 6.0 4.5 5.0 11.5 11.0 10.0 10.0 10.5 9.5 11.0 12.5 10.0 12.5 12.5 13.5 13.0 12.5 MAX MHz ns ns ns ns ns ns ns Tamb = 0C to +70C UNIT
AC SETUP REQUIREMENTS FOR 74F646
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu (L) th (H) th (L) tw (H) tw (L) Setup time, high or low An or Bn to CPAB or CPBA Hold time, high or low An or Bn to CPAB or CPBA Pulse width, high or low CPAB or CPBA Waveform 4 Waveform 4 Waveform 1 4.5 4.5 0 0 4.0 6.0 TYP MAX VCC = +5.0V 10% CL= 50pF, RL = 500 MIN 5.0 5.0 0 0 4.0 6.0 MAX ns ns ns Tamb = 0C to +70C UNIT
1990 Sep 25
8
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
AC ELECTRICAL CHARACTERISTICS FOR 74F648
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ Maximum clock frequency Propagation delay CPAB or CPBA to An or Bn Propagation delay An to Bn or Bn to An Propagation delay SAB or SBA to An or Bn Output enable time OE to An or Bn Output enable time DIR to An or Bn Output disable time OE to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 3 Waveform 2,3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 100 5.0 5.0 3.0 4.0 4.5 4.5 4.5 6.0 4.5 6.0 6.0 6.0 5.0 5.0 TYP 115 7.0 7.5 6.0 6.0 7.0 6.5 7.0 8.5 7.0 8.5 9.0 8.5 9.0 9.0 9.5 9.5 8.5 8.5 8.5 8.5 10.0 11.0 10.0 11.0 11.5 12.0 12.5 12.5 MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 90 4.5 4.5 2.5 3.5 4.5 4.5 4.5 5.5 4.0 5.5 6.0 6.0 4.5 5.0 11.0 11.0 9.5 9.5 10.5 9.5 11.0 12.5 11.0 12.5 12.5 13.5 14.0 14.0 MAX MHz ns ns ns ns ns ns ns Tamb = 0C to +70C UNIT
AC SETUP REQUIREMENTS FOR 74F648
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu (L) th (H) th (L) tw (H) tw (L) Setup time, high or low An or Bn to CPAB or CPBA Hold time, high or low An or Bn to CPAB or CPBA Pulse width, high or low CPAB or CPBA Waveform 4 Waveform 4 Waveform 1 4.0 4.0 0 0 3.5 6.5 TYP MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 5.0 5.0 0 0 4.0 7.0 MAX ns ns ns Tamb = 0C to +70C UNIT
1990 Sep 25
9
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
AC ELECTRICAL CHARACTERISTICS FOR 74F646A
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ Maximum clock frequency Propagation delay CPAB or CPBA to An or Bn Propagation delay An to Bn or Bn to An Propagation delay SAB or SBA to An or Bn Output enable time OE to An or Bn Output enable time DIR to An or Bn Output disable time OE to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 2 Waveform 2, 3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 165 5.5 4.5 4.0 2.0 4.5 3.5 3.0 3.0 3.0 3.5 1.5 2.5 2.0 3.0 TYP 185 7.0 7.0 6.0 5.0 6.5 8.0 5.5 5.5 5.0 6.0 4.0 5.5 4.5 5.0 10.5 9.5 9.0 8.0 9.5 10.0 9.0 10.0 8.0 8.5 6.5 8.0 7.5 8.0 MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 150 4.5 4.0 3.5 2.0 4.0 3.0 2.5 2.5 3.0 3.0 1.0 2.0 1.5 2.0 11.0 10.0 10.0 8.0 10.0 11.5 10.0 10.5 8.5 9.5 8.0 9.5 8.5 8.5 MAX MHz ns ns ns ns ns ns ns Tamb = 0C to +70C UNIT
AC SETUP REQUIREMENTS FOR 74F646A
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu (L) th (H) th (L) tw (H) tw (L) Setup time, high or low An or Bn to CPAB or CPBA Hold time, high or low An or Bn to CPAB or CPBA Pulse width, high or low CPAB or CPBA Waveform 4 Waveform 4 Waveform 1 3.5 4.0 0 0 3.5 3.5 TYP MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.0 4.5 0 0 4.5 4.0 MAX ns ns ns Tamb = 0C to +70C UNIT
1990 Sep 25
10
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
AC ELECTRICAL CHARACTERISTICS FOR 74F648A
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ Maximum clock frequency Propagation delay CPAB or CPBA to An or Bn Propagation delay An to Bn or Bn to An Propagation delay SAB or SBA to An or Bn Output enable time OE to An or Bn Output enable time DIR to An or Bn Output disable time OE to An or Bn Output disable time DIR to An or Bn Waveform 1 Waveform 1 Waveform 3 Waveform 2, 3 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 Waveform 5 Waveform 6 160 5.0 5.5 2.5 4.0 4.0 4.5 3.5 4.5 3.5 4.0 2.5 4.0 2.5 2.5 TYP 185 7.0 7.5 4.5 6.0 7.0 7.0 6.5 6.5 5.5 6.5 4.0 6.5 5.0 5.0 9.5 10.0 7.5 8.5 9.5 9.5 10.0 10.0 8.5 9.5 6.5 9.0 8.5 8.0 MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 135 4.5 4.5 2.0 4.0 3.5 4.5 3.5 4.0 3.0 4.0 2.0 3.5 2.0 3.5 10.5 10.5 8.5 9.5 11.5 10.0 11.0 11.5 9.0 10.0 8.0 10.0 9.0 9.0 MAX ns ns ns ns ns ns ns ns Tamb = 0C to +70C UNIT
AC SETUP REQUIREMENTS FOR 74F648A
LIMITS Tamb = +25C SYMBOL PARAMETER TEST CONDITION VCC = +5.0V CL = 50pF, RL = 500 MIN tsu (H) tsu (L) th (H) th (L) tw (H) tw (L) Setup time, high or low An or Bn to CPAB or CPBA Hold time, high or low An or Bn to CPAB or CPBA Pulse width, high or low CPAB or CPBA Waveform 4 Waveform 4 Waveform 1 4.0 4.0 0 0 3.5 3.5 TYP MAX VCC = +5.0V 10% CL = 50pF, RL = 500 MIN 4.5 4.5 0 0 4.0 3.5 MAX ns ns ns Tamb = 0C to +70C UNIT
AC WAVEFORMS
1/fmax CPBA or CPAB VM tw(H) tPHL VM VM tw(L) VM tPHL tPLH VM VM VM tPLH An or Bn VM VM SBA or SAB
An or Bn
Bn or An
An or Bn
SF00394
SF00395
Waveform 1. Propagation delay for clock input to output clock pulse width, and maximum clock frequency
Waveform 2. Propagation delay for An to Bn or Bn to An and SAB or SBA to An or Bn
1990 Sep 25
11
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
AC WAVEFORMS (Continued)
OE An or Bn VM tPLH Bn or An VM VM tPHL An or Bn VM An or Bn SBA or SAB VM DIR tPZH VM 0V tPHZ VOH -0.3V VM
SF00398 SF00396
Waveform 3. Propagation delay for An to Bn or Bn to An and SAB or SBA to An or Bn
Waveform 5. 3-state output enable time to high level and output disable time from high level
OE VM DIR An or Bn VM tsu(H) CPBA or CPAB VM VM th(H) VM tsu(L) VM th(L) An or Bn VM tPZL VM VOL +0.3V tPLZ 3.5V VM
SF00399 SF00397
Waveform 4. Data setup time and hold times
Waveform 6. 3-state output enable time to low level and output disable time from low level
NOTES: 1. For all waveforms, VM = 1.5V. 2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORM
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tw 10% 0V tw VM 10% tTLH (tr ) 0V AMP (V)
90%
Test Circuit for Open Collector Outputs SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open
VM
Input Pulse Definition
DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00128
1990 Sep 25
12
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1990 Sep 25
13
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1990 Sep 25
14
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
NOTES
1990 Sep 25
15
Philips Semiconductors
Product specification
Transceivers/registers
74F646/A/74F648/A
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05151
Philips Semiconductors
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